Senior Verification Engineer High-Speed Networking

N Consulting Limited; Belfast; Hybrid; GBP 80,000 - 100,000; Part time

Job summary

A technology consulting firm is seeking a Senior Verification Engineer to verify high-speed connectivity IP using advanced methodologies. The role entails working with UVM in a hybrid environment, focusing on coverage closure and integration for networking protocols. Candidates should possess expertise in Git, Python scripting, and adaptive SoC design flows. This 2-year contract offers competitive pay based in Belfast, Northern Ireland.

Qualifications

• Strong background in UVM and verification methodologies.
• Familiarity with high-speed networking protocols essential.
• Experience with Git and CI/CD workflows.

Responsibilities

• Verify high-speed connectivity IP using advanced methods.
• Support coverage closure and integration of VIP.
• Ensure compliance with networking protocols.

Skills

UVM

Constrained-random verification

Testplan/coverage sign-off

100Gb Ethernet

PCIe Gen5

AMBA/AXI

Python scripting

CI/CD-based regression workflows

Git proficiency

Adaptive SoC design flows (Vivado/Vitis)

Embedded processor co-simulation

SoC debug

Job description

LocationBelfast, United Kingdom# Senior Verification Engineer – High-Speed Networking at N Consulting LtdLocationBelfast, United KingdomSalary£300 - £400 /dayJob TypeContractDate PostedJanuary 25th, 2026Apply NowWork mode: Hybrid Contract duration: 2 years Location: Belfast --------------------------------------- JOB DETAILS Role Title: Senior Verification Engineer – High-Speed Networking Core Scope: Verify high-speed connectivity IP using advanced verification methodologies and class-based UVM environments. Support coverage closure and integration of VIP for networking protocols. Key Skills: UVM, constrained-random verification, testplan/coverage sign-off 100Gb Ethernet, PCIe Gen5, AMBA/AXI Python scripting and CI/CD-based regression workflows Git proficiency Experience with Adaptive SoC design flows (Vivado/Vitis) Understanding of embedded processor co-simulation and SoC debug