Hardware Verification Engineer

Semiconductor Engineering; United Kingdom; On-site; GBP 60,000 - GBP 80,000; Full time

Job summary

A technology firm is seeking a seasoned Design Verification designer in the United Kingdom. You will create test plans for highly configurable IPs and write UVM/SystemVerilog code for implementation. Collaboration with software and design teams is crucial, making this role pivotal in ensuring robust solutions. This position offers an opportunity to shape the technology portfolio of a forward-thinking firm.

Qualifications

• Seasoned designer with a strong background in building testbenches and writing test sequences for complex IPs.
• Experience with UVM/SystemVerilog coding.

Responsibilities

• Create test plans for highly configurable IPs.
• Write UVM/SystemVerilog code to implement the test plan.
• Collaborate with software teams to define and implement configurable testbenches.
• Work with design teams on test plans, failure debug, coverage.

Job description

Overview

We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities

• Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems
• Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards
• Collaborate with software teams to define and implement configurable testbenches
• Work with design teams test plans, failure debug, coverage, etc.

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