Principal Design Engineer

Cadence Design Systems; Cork; On-site; EUR 70,000 - 110,000; Full time

Job summary

A leading company in electronic design seeks a Principal Design Engineer in Cork. This pivotal role involves developing and validating SoC systems for high-performance applications, integrating advanced IP, and demonstrating system capabilities. Ideal candidates will have significant experience in ASIC design and a strong background in hardware integration.

Qualifications

• 8+ years of work experience or 4+ years with MS.
• Experience in ASIC design, integration, or verification.
• Expertise in processor design or high-speed interfaces.

Responsibilities

• Develop, implement, and debug SoC reference systems.
• Integrate compute and interface IP in system designs.
• Analyze IP products and improve implementation flows.

Skills

ASIC design

IP integration

Verilog/System Verilog

RTL design techniques

UVM for functional verification

Education

BS in Electronic Engineering/Computer Science

MS in EE/CS

Tools

Cadence EDA tools

Synopsys EDA tools

Job description

Principal Design Engineer page is loaded

Principal Design Engineer

Apply locations CORK 01 time type Full time posted on Posted 30+ Days Ago job requisition id R46907

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Principal Design Engineer

Location: Cork

Reports to: Sr Design Engineering Architect

Job Overview:

The Cadence Computer Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware accelerators, and subsystems. Our IP designs are used by most of the top semiconductor vendors today, and our customers are shipping billions of chips annually using our components.

The CSG Central Applications Engineering team seeks an experienced and talented SoC design engineer to join a new team for CSG systems. In this role, you will be responsible for developing and validating reference systems for Computer Vision, Machine Learning, Radar, Automotive, and other high-performance applications.

This is a technically rewarding role with high visibility within the organization. The team is responsible for supporting customers of CSG subsystems. The group will also implement reference designs on emulation systems and support applications for product demonstrations.

This role requires extensive experience IP integration and implementing SoC and compute-based systems. You will work closely with compute and interface IP development engineering and build designs to demonstrate the capabilities of CSG subsystems and components.

Responsibilities:

• Develop, implement, and debug SoC reference systems.
• Integrate compute, memory and interface IP in system designs.
• Analyse IP products and implementation flows.
• Identify gaps and work with development teams to improve products.
• Develop collateral, and training material for CSG system customers.
• Identify and implement best practices in hardware design, testing, and validation to improve efficiency and reliability.
• Stay up to date with latest industry trends, technologies, and design methodologies, and incorporate them into team’s workflows.

Requirements:

• BS in Electronic Engineering/Computer Science with 8+ years work experience, or MS in EE/CS with 4 + years’ experience.
• Must have at least 3 years of experience in ASIC design, integration, or verification .
• Must have expertise in some of the following domains: processor design, on-chip communication and interconnects, high-speed interfaces, or chiplets .
• Expertise in Verilog/System Verilog for coding and verification.
• Proficiency in RTL design techniques, including synthesis, timing closure, and verification.
• Experience in using UVM for functional verification of ASIC designs.
• Experience with EDA tools like Cadence and Synopsys for design simulation and verification.
• Extensive experience with FPGA emulation, design tools, and verification.

Additional Information:

Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.

We’re doing work that matters. Help us solve what others can’t.

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.